Modular Gang Programmer
Flasher ATE is perfectly suited for high volume mass production environments. The modular system uses a communication main board at its heart, that distributes the commands received from an ATE, ICT or a similar automated production handler system to the programming modules. Each programming module can be set up with individual configurations and firmware. The Gang Programmer is capable to program multiple devices in parallel, whether these devices are equal or part of a multi-device system, Flasher ATE can handle all production setups.
- In-System Programmer (ISP)
- Ultra fast programming
- Control interfaces for ATEs and similar production process handlers
- Switchable target power
- J-Flash for an easy setup
- Scalable solution with up to 10 individual channels
- Parallel channels, no demultiplexing required
- Galvanic isolation of each module
- Target supply voltage may be up to 15V
- Gang Programming
Device Under Test (DUT) Support
Production environments require more than just creating and programming. Once the production cycle is started, there are all kinds of verifications taking place. The target interfaces of the Flasher ATE programmer modules include a UART transceiver. This UART transceiver can be managed from the ATE or similar production handler devices via the connection with the Flasher ATE base board. Once it is activated, serial communication via pin 5 and pin 17 is mapped to an IP connection, so the ATE is able to communicate with the freshly programmed device without requiring additional hardware.
The Flasher ATE can be used for programming flash targets stand-alone. It has to be prepared by using either the J-Flash Software or the Universal Flash Loader Configurator.
Setting up Flasher ATE for the first use
In order to use Flasher ATE for the first time, you need to install the Flasher ATE related software and documentation pack which, among others, includes the J-Flash software. Then, connect the Flasher ATE to the network via ethernet. The Flasher ATE is preconfigured to obtain an IP address via DHCP or autoconfiguration.
In general, the Flasher ATE should be powered on before connecting it to the target device. That means you should first connect the Flasher ATE to the host system via USB or an external power supply and then connect the Flasher ATE to the target device via JTAG.
Using Flasher with PC Software “J-Flash”
J-Flash is a software running on Windows (Windows 2000 or later) systems and enables you to program your flash EEPROM devices via the JTAG connector on your target system.
J-Flash works with any device/core that is supported by J-Link and supports all common external flashes, as well as the programming of internal flash of ARM microcontrollers.
In order to use J-Flash with the Flasher ATE, the configuration and data files, generated by J-Flash, have to be manually uploaded to each Flasher ATE module via the integrated FTP server.
Remote Control of the Flasher ATE
The Flasher ATE can be remote controlled by automated test equipment without the need of a connection to a PC. Therefore the Flasher ATE is equipped with additional hardware control functions, which are connected to the SUBD9 male connector, normally used as a RS232 interface to PC. The adjacend diagrams show the internal remote control circuitry of Flasher.
As the remote control circuit only allows limited control of the flash process (trigger all modules at once), the preferred method to control the Flasher ATE is either the RS232 interface or a telnet shell via ethernet. This command line interface allows a detailed control of the flash process of each module as well as putting each module into the UART transceiver mode mentioned above.
There are basically three types of speed settings:
- Fixed JTAG speed
- Automatic JTAG speed
- Adaptive clocking
Fixed JTAG speed
The target is clocked at a fixed clock speed. The maximum JTAG speed the target can handle depends on the target itself. In general ARM cores without JTAG synchronization logic (such as ARM7-TDMI) can handle JTAG speeds up to the CPU speed, ARM cores with JTAG synchronisation logic (such as ARM7-TDMI-S, ARM946E-S, ARM966EJ-S) can handle JTAG speeds up to 1/6 of the CPU speed. JTAG speeds of more than 10 MHz are not recommended.
Automatic JTAG speed
Selects the maximum JTAG speed handled by the TAP controller.
On ARM cores without synchronisation logic, this may not work reliably, since the CPU core may be clocked slower than the maximum JTAG speed.
If the target provides the RTCK signal, select the adaptive clocking function to synchronise the clock to the processor clock outside the core. This ensures there are no synchronisation problems over the JTAG interface.
If you use the adaptive clocking feature, transmission delays, gate delays, and synchronisation requirements result in a lower maximum clock frequency than with non-adaptive clocking. Do not use adaptive clocking unless it is required by the hardware design.